Known receivers that receive UWB signals include a configuration illustrated in FIG. 1 which is equipped with low noise amplifier (LNA) 1301, signal generator 1007, downconversion mixer 1302, A/D converter 1303, multiplier 1304, integration circuit 1305, and sampling circuit 1306. The configuration illustrated in FIG. 1 is an example of a receiver that receives impulse-like UWB signals described in Japanese Laid-Open Patent Application No. 2004-221939A (hereinafter, referred to as Patent Document 1).
Due to the use of impulse signals, the communication band of the receiver illustrated in FIG. 1 is expanded to 500 MHz or greater. In addition, codes such as “1101 . . . ” are created using an impulse with a 0 degree phase and an impulse with a 180 degree phase.
A reception signal (RF signal) inputted from an antenna is amplified by LNA 1301 and inputted to downconversion mixer 1302. Downconversion mixer 1302 uses a local (LO) signal generated by signal generator 1007 to frequency-convert a GHz-band RF signal into a baseband signal in the vicinity of DC. A/D converter 1303 converts the baseband signal into a digital signal. Multiplier 1304 multiplies a baseband digital signal, converted into a digital signal, by a template.
Integration circuit 1305 integrates a multiplication result of multiplier 1304. Sampling circuit 1306 acquires an integral value at the end of a symbol timing and outputs the same as symbol data.
Another receiver that processes broadband signals is a configuration equipped with an LNA, a switch, a capacitor, and a reset circuit described in IEEE JSSC, Vol. 39, No. 12, pp. 2278-2291, 2004 (hereinafter, referred to as Non-Patent Document 1).
With the receiver described in Non-Patent Document 1, a signal amplified by the LNA is inputted to the switch, whereby the switch performs a subsampling mixer operation where an RF signal is frequency-converted into a baseband signal. The baseband signal after frequency conversion is accumulated in the capacitor to be filtered by an FIR filter or an IIR filter that includes the capacitor. An electrical charge accumulated in the capacitor is discharged upon conclusion of filtering performed on the baseband signal.
Furthermore, a receiver equipped with an LC tank that includes an inductor and a capacitor, as well as a switch and a capacitor is described in Japanese Patent No. 3302981B (hereinafter, referred to as Patent Document 2).
According to Patent Document 2, signals are selectively passed by setting a resonant frequency of the LC tank to a vicinity of a signal frequency. The switch frequency-converts signals passed through the LC tank based on principles of the subsampling mixer described earlier, and accumulates frequency-converted signals in the capacitor.
Moreover, Japanese Laid-Open Patent Application No. 2007-097186A (hereinafter, referred to as Patent Document 3) describes a receiver equipped with an LNA, a downconversion mixer, an A/D converter, an MB-OFDM (Multi-Band Orthogonal Frequency Division Multiplexing) modem, and a DS-CDMA (Direct Spread Code Division Multiple Access) modem.
In the same manner as the receivers described in Non-Patent Document 1 and in Patent Documents 1 and 2, the receiver described in Patent Document 3 acquires a baseband digital signal from a received RF signal using the LNA, the downconversion mixer, and the A/D converter. The baseband digital signal is to be signal-processed by the MB-OFDM modem or the DS-CDMA modem. In addition, the receiver described in Patent Document 3 is equipped with a mode switch and a controller for selecting the MB-OFDM modem or the DS-CDMA modem.
However, in the background art described above, the receiver described in Patent Document 1 is configured divided according to functions such as frequency conversion by the mixer, A/D conversion, baseband processing using a digital signal (multiplication, integration), and the like. As a result, respective circuit sizes (chip areas) and power consumptions are large and this leads to a problem in which the size of the circuit and power consumption, that is needed to perform signal demodulation, are increased. In addition, the impulse-like reception signal and the template are required so as to be accurately synchronized not only in symbol-units but also in chip-units. While Patent Document 1 describes reducing the time needed for synchronous acquisition using a short code, sliding correlation processing and the like are also time-consuming, which in turn results in an increase in power consumption.
On the other hand, while Non-Patent Document 1 describes frequency conversion and filtering, no disclosures are made concerning signal demodulation. This means that a demodulating circuit is required after filtering, which leads to increases in required circuit size and power consumption.
While Patent Document 2 describes frequency selection using an LC tank and frequency conversion using a switch, in the same manner as Non-Patent Document 1, no disclosures are made concerning signal demodulation. This means that a demodulating circuit is required after frequency conversion, which leads to increases in required circuit size and power consumption.
Patent Document 3 presents a configuration divided according to functions such as frequency conversion by the mixer, A/D conversion, demodulation using a digital signal, and the like in the same manner as Patent Document 1. As a result, circuit sizes and power consumption increase.